DS3106
39
8.4
Register Definitions
Table 8-1. Register Map
Note: Register names are hyperlinks to register definitions. Underlined fields are read-only.
ADDR
REGISTER
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
00h
ID[7:0]
01h
ID[15:8]
02h
REV[7:0]
03h
PALARM
D180
RA
0
8KPOL
0
05h
IC4
IC3
06h
STATE
SRFAIL
07h
FREQ[18:16]
09h
T0SOFT
T0STATE[2:0]
0Ah
SELREF[3:0]
0Ch
FREQ[7:0]
0Dh
FREQ[15:8]
0Eh
IC4
IC3
11h
ACT4
ACT3
17h
HORDY
MRAA
22h
DIVN
LOCK8K
FREQ[3:0]
23h
DIVN
LOCK8K
FREQ[3:0]
32h
RST
FREN
LOCKPIN
T0STATE[2:0]
34h
XOEDGE
FRUNHO
SONSDH
38h
DIG2AF
DIG2SS
DIG1SS
39h
DIG2F[1:0]
DIG1F[1:0]
3Ah
OC6SF[1:0]
3Bh
AUTOBW
LIMINT
3Ch
MCLKFREQ[7:0]
3Dh
MCLKFREQ[15:8]
40h
AVG
41h
HARDLIM[7:0]
42h
HARDLIM[9:8]
43h
IC4
IC3
44h
STATE
SRFAIL
IC9
46h
DIVN[7:0]
47h
DIVN[15:8]
48h
SRFPIN
4Dh
FLLOL
SOFTLIM[6:0]
4Eh
HORDY
4Fh
AOF6
AOF3
50h
LB0U[7:0]
51h
LB0L[7:0]
52h
LB0S[7:0]
53h
LB0D[1:0]
61h
OFREQ3[3:0]
62h
OFREQ6[3:0]
63h
MFSEN
FSEN
64h
T4FREQ[3:0]
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